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2000, vol.100, no.237	2000, vol.100, no.238	2000, vol.100, no.309	2000, vol.100, no.310	2000, vol.100, no.41	2000, vol.100, no.42
2000, vol.100, no.5	2000, vol.100, no.6

题名	作者	出版年	年卷期
New architecture for cost-efficient high-performance multiple-bank RDRAM	Seiro Imai; Takeshi Nagai; Satoru Takase; Hideo Mukai; Hiroshi Maejima; Mikihiko Ito; Hiroko Waki; Kiyofumi Sakurai; Takahiko Hara; Masaru Koyanagi; Kaoru Nakagawa	2000	2000, vol.100, no.6
A DRAM system for consistently reducing CPU wait cycles	Yusuke Kanno; Hiroyuki Mizuno; Takao Watanabe	2000	2000, vol.100, no.6
Current status of PPRAM (parallel processing RAM)	Kazuaki Murakami	2000	2000, vol.100, no.6
Technology trend of flash memory	Fujio Masuoka; Tetsuo Endoh	2000	2000, vol.100, no.6
A channel erasing 1.8V-only 32Mb nor flash EEPROM with a bit line direct sensing scheme	Y. Takano; A. Umezawa; T. Tanzawa; T. Taura; H. Shiga; T. Miyaba; M. Matsui; H. Watanabe; K. Isobe; S. Kitamura; S. Yamada; M. Saito; S. Mori; T. Watanabe; S. Atsumi	2000	2000, vol.100, no.6
A 128Kbit FeRAM macro for a contact/contactless smart card microcontroller	Junichi Yamada; Tohru Miwa; Hiroki Koike; Hideo Toyoshima; Kazushi Amanuma; Sota Kobayashi; Toru Tatsumi; Yukihiko Maejima; Hiromitsu Hada; Hidemitsu Mori; Seiichi Takahashi; Hidenori Takeuchi; Takemitsu Kunio	2000	2000, vol.100, no.6