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期刊


ISSN1057-7130
刊名IEEE Transactions on Circuits and Systems
参考译名IEEE电路系统汇刊
收藏年代1998～2007

关联期刊参考译名收藏年代
IEEE Transactions on Circuits and SystemsIEEE电路系统汇刊2007～2013


全部

1998 1999 2000 2001 2002 2003
2004 2005 2006 2007

2003, vol.50, no.1 2003, vol.50, no.10 2003, vol.50, no.11 2003, vol.50, no.12 2003, vol.50, no.2 2003, vol.50, no.3
2003, vol.50, no.4 2003, vol.50, no.5 2003, vol.50, no.6 2003, vol.50, no.7 2003, vol.50, no.8 2003, vol.50, no.9

题名作者出版年年卷期
Jitter Transfer Analysis of Tracked Oversampling Techniques for Multigigabit Clock and Data RecoveryYoungdon Choi; Deog-Kyoon Jeong; Wonchan Kim20032003, vol.50, no.11
On The Analysis of AE Fractional-TV Frequency Synthesizers for High-Spectral PurityBram De Muer; Michiel S. J. Steyaert20032003, vol.50, no.11
Techniques for In-Band Phase Noise Reduction in △∑ SynthesizersThomas A. D. Riley; Norman M. Filiol; Qinghong Du; Juha Kostamovaara20032003, vol.50, no.11
A Behavioral Modeling Approach to the Design of a Low Jitter Clock SourceGabriele Manganaro; Ung Kwak; SeongHwan Cho; Anurag Pulincherry20032003, vol.50, no.11
Digitally Controlled Oscillator (DCO)-Based Architecture for RF Frequency Synthesis in a Deep-Submicrometer CMOS ProcessRobert Bogdan Staszewski; Dirk Leipold; Khurram Muhammad; Poras T. Balsara20032003, vol.50, no.11
Phase-Noise Cancellation Design Tradeoffs in Delta-Sigma Fractional-N PLLsSudhakar Pamarti; Ian Galton20032003, vol.50, no.11
A Fractional-TV Frequency Synthesizer Architecture Utilizing a Mismatch Compensated PFD/DACScott E. Meninger; Michael H. Perrott20032003, vol.50, no.11
Analytical Model and Behavioral Simulation Approach for a ∑△ Fractional-N Synthesizer Employing a Sample-Hold ElementMarco Cassia; Peter Shah; Erik Bruun20032003, vol.50, no.11
Design of CMOS Adaptive-Bandwidth PLL/DLLs A General ApproachJaeha Kim; Mark A. Horowitz; Gu-Yeon Wei20032003, vol.50, no.11
Methodology for On-Chip Adaptive Jitter Minimization in Phase-Locked LoopsMozhgan Mansuri; Ali Hadiashar; Chih-Kong Ken Yang20032003, vol.50, no.11
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