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期刊
ISSN
0925-1030
刊名
Analog Integrated Circuits and Signal Processing
参考译名
模拟集成电路与信号处理
收藏年代
2000~2024
全部
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2024
2015, vol.82, no.1
2015, vol.82, no.2
2015, vol.82, no.3
2015, vol.83, no.1
2015, vol.83, no.2
2015, vol.83, no.3
2015, vol.84, no.1
2015, vol.84, no.2
2015, vol.84, no.3
2015, vol.85, no.1
2015, vol.85, no.2
2015, vol.85, no.3
题名
作者
出版年
年卷期
An improvement of the current-voltage conversion technique in over-current sensing circuit for low-power low dropout linear voltage regulators
Tay, Ho Quang
2015
2015, vol.85, no.2
Delta-sigma DAC with jitter-shaper-reducing jitter noise
Watanabe, Yuki; Saikatsu, Satoshi; Yoshino, Michitaka; Yasuda, Akira
2015
2015, vol.85, no.2
Design of a symmetry-type floating impedance scaling circuits for a fully differential filter
Matsumoto, Fujihiko; Nishioka, Syuzo; Ohbuchi, Takeshi; Fujii, Tatsuya
2015
2015, vol.85, no.2
A low-power and low-Gm linear transconductor utilizing control of a threshold voltage
Ohbuchi, Takeshi; Matsumoto, Fujihiko
2015
2015, vol.85, no.2
In-pixel time-to-digital converter for 3D TOF cameras with time amplifier
Tang, Lizhen; Jin, Xiangliang; Yang, Hongjiao; Yang, Jia; Liu, Weihui
2015
2015, vol.85, no.2
An NTF-enhanced time-based continuous-time sigma-delta modulator
Tamaddon, Mohsen; Yavari, Mohammad
2015
2015, vol.85, no.2
A 7.5 GS/s flash ADC and a 10.24 GS/s time-interleaved ADC for backplane receivers in 65 nm CMOS
Chung, Hayun; Deniz, Zeynep Toprak; Rylyakov, Alexander; Bulzacchelli, John; Friedman, Daniel; Wei, Gu-Yeon
2015
2015, vol.85, no.2
A low-jitter third-order self-biased PLL with adaptive fast-locking scheme for SerDes interfaces
Zhang, Hong; Du, Xin; Zhang, Yao; Gong, Liao; Cheng, Jun
2015
2015, vol.85, no.2
Phase-locked loop stability based on stochastic bounds
Baker, Robert J. A.; Leung, Bosco; Nielsen, Christopher
2015
2015, vol.85, no.2
CMOS transceiver with high input dynamic range and wide modulation-depth for RFID and NFC readers
Kim, Young-Jin; Hwang, In-Chul; Park, Sang-Yong; Baek, Donghyun
2015
2015, vol.85, no.2
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