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期刊
ISSN
0925-1030
刊名
Analog Integrated Circuits and Signal Processing
参考译名
模拟集成电路与信号处理
收藏年代
2000~2024
全部
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2024
2020, vol.102, no.1
2020, vol.102, no.2
2020, vol.102, no.3
2020, vol.103, no.1
2020, vol.103, no.2
2020, vol.103, no.3
2020, vol.104, no.1
2020, vol.104, no.2
2020, vol.104, no.3
2020, vol.105, no.1
2020, vol.105, no.2
2020, vol.105, no.3
题名
作者
出版年
年卷期
Energy efficient switching scheme based on MSB-split structure for SAR ADC
Zhang, Lizhen; Wu, Jianhui; Han, Shanshan
2020
2020, vol.105, no.1
Analysis of oscillator phase noise effect on high order QAM links
Bicici, Cagri; Ozdur, Ibrahim; Cerezci, Osman
2020
2020, vol.105, no.1
Low power 9-bit 500 kS/s 2-stage cyclic ADC using OTA variable bias current
Diaz-Madrid, Jose Angel; Domenech-Asensi, Gines; Ruiz-Merino, Ramon; Zapata, Juan; Martinez, Jose Javier
2020
2020, vol.105, no.1
Variation-tolerant, low-power, and high endurance read scheme for memristor memories
Ravi, V.; Chitra, K.; Prabaharan, S. R. S.
2020
2020, vol.105, no.1
Open-loop digital clock generator based VLSI architecture for electromagnetic interference reduction
Meenakshi Vidya, P.; Sudha, S.
2020
2020, vol.105, no.1
A 12-bit branching time-to-digital converter with power saving features and digital based resolution tuning for PVT variations
Teh, Jian Sen; Siek, Liter
2020
2020, vol.105, no.1
Analysis and investigation of CDBA based fractional-order filters
Kaur, Gagandeep; Ansari, Abdul Quaiyum; Hashmi, M. S.
2020
2020, vol.105, no.1
A reusable stage based reduced comparator count binary search ADC
Dipti; Singh, Sajai Vir; Joshi, Rohit; Misra, Prasanna Kumar; Goswami, Manish
2020
2020, vol.105, no.1
Least squares linear phase FIR filter design and its VLSI implementation
Khan, Mansoor; Agha, Shahrukh
2020
2020, vol.105, no.1
An opamp-free second-order noise-shaping SAR ADC with 4x passive gain using capacitive charge pump
Yi, Pinyun; Zhu, Zhangming; Li, Dengquan; Fang, Liang
2020
2020, vol.105, no.1
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