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期刊
ISSN
0925-1030
刊名
Analog Integrated Circuits and Signal Processing
参考译名
模拟集成电路与信号处理
收藏年代
2000~2024
全部
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2024
2024, vol.118, no.1
2024, vol.118, no.2
2024, vol.118, no.3
2024, vol.119, no.1
2024, vol.119, no.2
2024, vol.119, no.3
题名
作者
出版年
年卷期
A 4-D four-wing chaotic system with widely chaotic regions and multiple transient transitions
Li, Lingyun; Chai, Zhijun; Wang, Yunxia
2024
2024, vol.119, no.1
A hybrid ensemble voting-based residual attention network for motor imagery EEG Classification
Jindal, K.; Upadhyay, R.; Singh, H. S.
2024
2024, vol.119, no.1
Design a novel 1-bit full adder with hybrid logic for full-swing, area-efficiency and high-speed
Arul, A.; Kathirvelu, M.
2024
2024, vol.119, no.1
Design and implementation of high-performance 20-T hybrid full adder circuit
Kandpal, Jyoti; Tomar, Abhishek
2024
2024, vol.119, no.1
Design an energy efficient pulse triggered ternary flip flops with Pseudo NCFET logic
Yamani, Sudha Vani; Ramprasad, M. V. S.; Dinesh, Gundala; Yeshaswila, Eegala Yamini; Teja, Chelluri Ravi; Lokesh, Botta
2024
2024, vol.119, no.1
A design approach for class-AB operational amplifier using the g m /I D methodology
Chen, Chen; Cheng, Jinxing; Wang, Hongyi; Fan, Youyou; Wu, Kaikai; Tao, Tao; Wang, Qingbo; Yu, Ai; Wen, Weiwei; Wu, Youpeng; Zhang, Yue
2024
2024, vol.119, no.1
Reliable and ultra-low power approach for designing of logic circuits
Ul Haq, Shams; Sharma, Vijay Kumar
2024
2024, vol.119, no.1
Signal dynamic range expansion and power supply voltage reduction for an exponentiation conversion IC
Nishiyama, Naoya; Matsui, Fumiya; Sano, Yuji
2024
2024, vol.119, no.1
Low voltage high bandwidth FVF current mirror using quasi floating self-cascode output stage
Domala, Narsaiah; Sasikala, G.; Raj, Nikhil
2024
2024, vol.119, no.1
Design and simulation of a new current mirror circuit with low power consumption and high performance and output impedance
Li, Yuping; Wang, Haihua; Trik, Mohammad
2024
2024, vol.119, no.1
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