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期刊
ISSN
0923-8174
刊名
Journal of Electronic Testing
参考译名
电子测试杂志:理论与应用
收藏年代
2000~2024
全部
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2004, vol.20, no.1
2004, vol.20, no.2
2004, vol.20, no.3
2004, vol.20, no.4
2004, vol.20, no.5
2004, vol.20, no.6
题名
作者
出版年
年卷期
On Using Exponential-Golomb Codes and Subexponential Codes for System-on-a-Chip Test Data Compression
LEI LI; KRISHNENDU CHAKRABARTY
2004
2004, vol.20, no.6
Area Minimization of Exclusive-OR Intensive Circuits in FPGAs
SEOK-BUM KO
2004
2004, vol.20, no.6
Power-Driven Routing-Constrained Scan Chain Design
Y. BONHOMME; P. GIRARD; L. GUILLER; C. LANDRAULT; S. PRAVOSSOUDOVITCH
2004
2004, vol.20, no.6
Scan Test Strategy for Asynchronous-Synchronous Interfaces
OCTAVIAN PETRE; HANS G. KERKHOFF
2004
2004, vol.20, no.6
A Built-in-Self-Test Scheme for Segmented and Binary Weighted DACs
SUNIL RAFEEQUE, K. P.; VINITA VASUDEVAN
2004
2004, vol.20, no.6
A Signature Analysis Technique for the Identification of Failing Vectors with Application to Scan-BIST
MICHAEL GOESSEL; KRISHNENDU CHAKRABARTY; VITALIJ OCHERETNIJ; ANDREAS LEININGER
2004
2004, vol.20, no.6
Modeling Custom Digital Circuits for Test
SOUMITRA BOSE
2004
2004, vol.20, no.6
Using RT Level Component Descriptions for Single Stuck-at Hierarchical Fault Simulation
ZAINALABEDIN NAVABI; SHAHRZAD MIRKHANI; MEISAM LAVASANI; FABRIZIO LOMBARDI
2004
2004, vol.20, no.6
Error Detection Enhancement in COTS Superscalar Processors with Performance Monitoring Features
AMIR RAJABZADEH; SEYED GHASSEM MIREMADI; MIRZAD MOHANDESPOUR
2004
2004, vol.20, no.5
A Two-Level Power-Grid Model for Transient Current Testing Evaluation
B. ALORDA; V. CANALS; J. SEGURA
2004
2004, vol.20, no.5
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